Diamond chips, faster control and Helix error correction advance three quantum approaches

A diamond chip, a faster way to control quantum states and a compact error-correcting code address three different engineering problems. Announcements from Fujitsu, Chalmers and Quantinuum this week show how quantum research is progressing across hardware, control and reliability.

Fujitsu connects diamond spins with photonics

Fujitsu announced a working prototype on 8 September, developed through research with TU Delft and QuTech that began in 2020.

It calls the device the first working diamond-spin quantum-computer prototype incorporating tin-vacancy centres into photonic integrated circuits. That precise combination is the scope of its first-of-its-kind claim.

A tin-vacancy centre is an engineered defect in diamond that can support a quantum state. Integrating it with optical waveguides helps extract photons, providing a route to connect modules using light.

Fujitsu says the prototype operates at −271.6°C and has been used through its hybrid quantum-computing platform in a test environment. A multi-module prototype is targeted for 2027.

How does Chalmers make operations faster?

The Chalmers team’s theoretical method performs certain operations on bosonic quantum states within a single driving cycle. Previous approaches could require thousands.

Bosonic codes store information in the states of an oscillator, such as a microwave resonator. The researchers use quantum lattice gates and periodic, or Floquet, control to prepare and manipulate those protected states more quickly.

Their Physical Review Letters paper is the basis for the reported speed-up of more than 1,000 times for some operations. This is a theoretical result; the team says it is discussing an experimental implementation using superconducting circuits.

The benefit would be less time for disturbances to corrupt a state while an operation is taking place. The reported factor applies to the specified control operations, with full-computer performance dependent on the rest of the system.

Quantinuum tests Helix on Helios

Quantinuum has demonstrated a compact error-correcting architecture on its 98-qubit Helios processor. Its research paper describes the C4-Helix code, which encodes two logical qubits in 20 physical data qubits. Error-correction operations also require supporting resources.

Logical qubits distribute information across physical qubits so errors can be detected and corrected. The team tested repeated correction, operations on the encoded information and a connection between Helix and a separate surface code.

The company’s account reports a memory error rate of 4.6 × 10⁻⁵ per logical qubit per correction cycle. Its tested logical Clifford operations performed better than the corresponding physical baseline. These comparisons included all runs, without filtering results through post-selection.

Three engineering tests

Together, the results address how quantum systems connect, how quickly they act and how reliably they preserve information. Each has a concrete test ahead: a larger connected device, a laboratory demonstration or sustained computation using protected logical qubits.